MONDAY, OCTOBER 19, 2009
8:00 – 8:10 Introduction
8:10 – 8:40 Keynote
address
8:40 – 10:00
Signal Integrity I
Improving
Single-Ended Channel Performance with a Dynamic Reference Voltage Scheme
Tingdong Zhou, Daniel M. Dreps and Wiren D.
Becker IBM Corporation
Designing a ZXnoise
Pseudo-Differential Link
Frédéric Broydé. Excem
Bernard Démoulin.. Université des Sciences et
Technologies de Lille
Extraction
of Via and Trace Model from PCB Channel S-Parameter Data by Stochastic
Optimization
Juyoung Lee and Drew Doblar................ Sun Microsystems
Through
Silicon Via (TSV) Equalizer
Joohee Kim, Eakhwan Song, Jeonghyeon Cho
and Jun So Pak............ KAIST
Junho Lee, Hyungdong Lee and Kunwoo Park....... Hynix Semiconductor
Joungho Kim............ KAIST
10:00 – 10: 30
Refreshment Break
10:30 –
11:50
Power
Integrity I
Achieving Near Zero SSN Power Delivery Networks by Eliminating
Power Planes and Using Constant Current Power Transmission Lines (Student Paper)
Suzanne Huh, Daehyun
Chung and Madhavan Swaminathan Georgia
Institute of Technology
Statistical Simulation of SSO Noise
in Multi-Gigabit Systems
Wendemagegnehu T. Beyene, Amir Amirkhany
and Ali Abbasfar......... Rambus
Low-Impedance
Power Distribution Network of Decoupling Capacitor Embedded Interposers for 3-D
Integrated LSI System
Katsuya Kikuchi National Institute of Advanced Industrial Science and
Technology (AIST)
Koichi Takemura.. Association of Super-Advanced Electronics Technologies
(ASET)
Chihiro Ueda............. Meisei University
Osamu Shimada, Toshio Gomyo, Yukiharu
Takeuchi, Toshikazu Okubo and Kazuhiro Baba
2Association
of Super-Advanced Electronics Technologies (ASET)
Masahiro Aoyagi National Institute of Advanced Industrial Science and
Technology (AIST)
Toshio Sudo......... Shibaura
Institute of Technology
Kanji Otsuka............. Meisei University
Resonance-aware Methodology for
System Level Power Distribution Network Co-design
Amirali
Shayan, Kevin Bowles, Sorin Dobre, Mikhail Popovich, Xiaoming Chen and
Christopher Pan Qualcomm
11:50 – 1:15 Lunch
1:15 – 2:00
Tutorial
Jitter in High Speed Channels
2:00 – 3:20
High Speed
Links
Design
and Characterization of a 12.8GB/s Low Power Differential Memory System for
Mobile Applications
Dan Oh, Sam Chang, Chris Madden, Joong-Ho
Kim, Ralf Schmitt, Ming Li, Chuck Yuan
Fred Ware, Brian Leibowitz, Yohan Frans
and Nhat Nguyen Rambus
Low-power Self-equalizing Driver for
Silicon Carrier Interconnects with Low Bit Error Rate
(Student Paper)
Peter Gadfort and Paul D. Franzon... North Carolina State University
Energy-Efficient Performance Budgeting in FEC-Based High-Speed I/O Links
Rajan Lakshmi Narasimha and Naresh Shanbhag..... University of Illinois at
Urbana-Champaign
DSP-based
Multimode Signaling for FEXT Reduction in Multi-Gbps Links
Pavle Milosevic, José E. Schutt-Ainé and
Naresh R. Shanbhag.......
University
of Illinois at Urbana-Champaign
3:20 – 3: 50 Break
3:50 – 4:50
Signal
Integrity II
Clock
Jitter Modeling in Statistical Link Simulation
Dan Oh and Sam Chang......... Rambus
Hybrid Equalizer Design for 12.5 Gbps Serial Data Transmission
Eakhwan Song, Jeonghyeon
Cho and Joungho Kim................
......... Korea Advanced Institute of
Science and Technology
The
Effects of Time Windowing on the Accuracy of the Short-Pulse Propagation
Technique
(Student
Paper)
Lionelle F. Wells University of Arizona
Alina Deutsch IBM T.J.Watson Research Center
Zhen Zhou and Kathleen L. Melde University of Arizona
4:50 – 6:30
Posters
Design
of a SIW-Based Data Communication System Using a SIW Six-Port Receiver (Student Paper)
Abdulhadi E. Abdulhadi, Asanee Suntives and
Ramesh Abhari............. McGill
University
Model-to-Hardware Correlation of
Disk Resonators for Via-Array Modeling in High-Speed PCBs
Arun Reddy Chada. Missouri University
of Science and Technology
Young H. Kwark and Xiaoxiong Gu.......... IBM T.J. Watson Research Center
Jun Fan.......... Missouri University of Science and
Technology
A Precise Analytical Eye-diagram Estimation Method for Non-ideal
High-Speed Channels
Jeonghyeon Cho, Eakhwan
Song, Jongjoo Shim, Jiseong Kim and Joungho Kim............ KAIST
A Fast Methodology for the Synthesis
of Dispersive Multi-Port Equivalent Circuit Model of Multiple Coupled Bond
Wires
J. H. Chung..... University of Illinois
V.
Okhmatovski..... University of
Manitoba
A.C.
Cangellaris..... University of
Illinois
A New EBG Structure for
Low Frequency Power Plane Noise Mitigation
A. Ciccomancini Scogna
and G. Romo.... CST of America
Sensitivity
Analysis of Lossy Transmission Lines based on the Passive Method of
Characteristics
Amir Beygi and Anestis Dounavis..... University of Western Ontario
Fast Full Wave Analysis of PCB via
Arrays with Model-to-Hardware Correlation
Xiaoxiong Gu......... IBM T. J. Watson Research Center
Boping Wu..... University
of Washington
Christian Baks.. IBM T. J. Watson Research Center
Leung Tsang..... University
of Washington
Efficient Capacitance Solver for 3D
Interconnect Based on Template-Instantiated Basis Functions (Student Paper)
Yu-Chung Hsiao, Tarek El-Moselhy and Luca
Daniel Massachusetts Institute of
Technology
An Ultra Compact Electromagnetic
Band Gap Filter for GHz Power Noise Suppression Using LTCC technology
Yu-Wen Huang, Ting-Kuang Wang and Tzong-Lin
Wu..... National Taiwan University
A New Extraction Method of Characteristic Parameters of a Coupled
Transmission Line (Student Paper)
Minwoo Kang, Daehoon
Jang, Kwangsik Park, Chilhyeun Gwon, Kwisoo Kim, Jongsik Lim
Kwansun Choi and Dal
Ahn Soonchunhyang University
Design
and Testing of a High Speed Module Based Memory System
Ravi Kollipara, Ming Li, Don Mullen,
Wendemagegnehu Beyene, Chris Madden
and Chuck Yuan.. Rambus
Hideki Kusamitsu and Toshiyasu Ito......... Yamaichi Electronics Co
The Extraction and Measurement of On-Die Impedance for Power
Delivery Analysis
Xiaoping Liu and Yi-Feng
Liu Intel Corporation
Bit-Pattern Sensitivity Analysis and
Optimal On-Die-Termination for High-Speed Memory Bus Design (Student
Paper)
Evelyn Mintarno.......... Stanford University
Steven Yun Ji Intel Corporation
An LCP Package Model for Use in
Chip/Package Co-Design of an X-band SiGe Low Noise Amplifier
Chung Hang John Poh, Tushar K.
Thrivikraman, Swapan K. Bhattacharya, Chad E. Patterson,
John D. Cressler and John Papapolymerou Georgia Institute of Technology
On Adding Metalization to Improve
Via Performance on PCBs
Albert E. Ruehli, Xiaoxiong Gu and Mark B.
Ritter. IBM T. J. Watson Research
Center
Next
Generation I/O Power Delivery Design through SIPDCo-Analysis and Comprehensive Platform Validation
Yee Hung See Tau and Marcus Chan......... Intel Microelectronics
Perturbation Based Modeling Strategy
for Weakly Coupled Interconnects
Hao Shi Apple Inc.
The
Impact of Guard Trace with Open Stub on Time-Domain Waveform in High-Speed
Digital Circuits
Po-Wei Chiu and Guang-Hwa Shiue..... Chung Yuan Christian University
Numerical
Acceleration of Spectral Domain Approach for Shielded Microstrip Lines by
Approximating Summation with Corrected Integral
Sidharath
Jain and Jiming Song....... Iowa State University
A New Isolation Structure for
Crosstalk Reduction for Pogo Pins in a Test Socket
Ruey-Bo Sun
and Chang-Yi Wen.... National
Taiwan University
Yen-Chih
Chang. Hon
Hai Precision Ind. Co
Ruey-Beei Wu National Taiwan University
Chip-Package
Codesign with Redistribution Layer
Mahadevan Suryakumar, Yidnek Mekonnen and
Ananda Sarangi Intel Corporation
An Approach for Quantifying the
Conductor and Dielectric Losses in PCB Transmission Lines
Reydezel Torres-Torres and Víctor H.
Vega- González........
...... Instituto
Nacional de Astrofísica, Óptica y Electrónica
GPGPU-FDTD
Method for 2-Dimensional Electromagnetic Field Simulation and Its Estimation
Masaki Unno
Yuta Inoue and Hideki Asai......... Shizuoka
University
Distributed
Via Connectivity in High Resolution Package Power Delivery Modeling
Omer Vikinski Intel Corporation
Design of Shorting Vias in Alternative PCB Planes for Suppressing
Ground-Bounce Induced Electromagnetic Emission
Kai-Bin Wu, Fu-Sheng
Chang and Ruey-Beei Wu National
Taiwan University
On-Chip Global Clock Distribution
Using Directional Rotary Traveling-Wave Oscillator
Yulei Zhang, James F. Buckwalter and
Chung-Kuan Cheng University of
California, San Diego
Minimizing Crosstalk in High-Speed
Differential Buses by Optimizing Power/Ground
and Signal Assignment
Yang Yi and Yifang Liu Texas A&M University
Yaping Zhou and Wiren Dale Becker...... IBM Systems&Technology Group
TUESDAY, October 20, 2009
8:00 – 8:45
Tutorial
Macromodeling
8:45 – 10:25
Macaromodeling
On
The Performance of Weighting Schemes for Passivity Enforcement of Delayed Rational
Macromodels of Long Interconnects
A. Chinea, S. Grivet-Talocia and P.
Triverio... Politecnico di Torino
Passivity Verification and
Enforcement of Delayed Rational Approximations from Scattering Parameter Based
Tabulated Data (Student Paper)
Andrew Charest, Michel Nakhla and Ram Achar.. Carleton University
Order Estimation for Time-Domain Vector Fitting
Se-Jung Moon Intel Corporation
A.C. Cangellaris..... University of Illinois at
Urbana-Champaign
Least Squares Convolution: A Method
to Improve the Fidelity of Convolution in Transient Circuit Simulation
Michael Tsuk and Subramanian Lalgudi.. Ansoft
Application of Surrogate Modeling to
Generate Compact and PVT-sensitive IBIS Models (Student Paper)
Ting Zhu
and Paul D Franzon.. North Carolina
State University
10:25 – 10:55 Break
10:55 – 11:55
Signal Integrity III
Generalized Leapfrog Scheme for
Large-Scale Circuit Simulation
Tadatoshi Sekine and Hideki Asai......... Shizuoka University
Modeling
of IC power supply and I/O ports from measurements
I.
S. Stievano, L. Rigazio and I. A. Maio... Politecnico
di Torino
A. Girardi, R. Izzi2, F. Vitale and T.
Lessio........ Numonyx
Solver for Current Source Type
Driver(s) and Interconnect with Linear or Nonlinear Loads
Albert E. Ruehli IBM T. J. Watson Research Center
Jerry Hayes.... _IBM
Austin Research Laboratory
11:55 – 1:30
Lunch
1:30 – 2:30
System and
On-Chip Issues
Challenges
and Solutions for Next Generation Main Memory Systems
Joong-Ho Kim, Dan Oh, Ravi Kollipara, John
Wilson, Scott Best, Thomas Giovannini,
Ian Shaeffer, Michael Ching and Chuck
Yuan......... Rambus
Active Circuit to Through Silicon Via (TSV) Noise Coupling
Jonghyun Cho, Jongjoo
Shim, Eakhwan Song and Jun So Pak. KAIST
Junho Lee, Hyungdong Lee
and Kunwoo Park....... Hynix
Semiconductor
Joungho Kim............ KAIST
Experimental
Characterization of Metal Fill Placement and Size Impact on Spiral Inductors
(Student Paper)
Vikas S. Shilimkar, Steven G. Gaskill and Andreas Weisshaar ... Oregon State University
2:30 – 3:30
Power
Integrity II
Power Integrity
Optimization of 3D Chips Stacked Through TSVs (Student
Paper)
Waqar Ahmad, Li-Rong
Zheng, Roshan Weerasekera, Qiang Chen, Awet Yemane Weldezion
and Hannu Tenhunen.. KTH School of Information and
Communication Technologies
Extraction of Equivalent Inductance in Package-PCB Hierarchical
Power Distribution Network
Jingook Kim.......... Missouri University of
Science and Technology
Jaemin Kim........... KAIST
Liehui Ren and Jun Fan.......... Missouri University of
Science and Technology
Joungho Kim........... KAIST
James L. Drewniak.......... Missouri University of
Science and Technology
Effect of System
Components on Electrical and Thermal Characteristics for Power Delivery
Networks in 3D System Integration (Student Paper)
Jianyong Xie, Daehyun Chung and Madhavan Swaminathan Georgia Institute of Technology
Michael Mcallister.. IBM
Package Design
Alina Deutsch, Lijun Jiang and Barry J Rubin IBM
T. J. Watson Research Center
3:30 -4:00
Break
4:00 – 5:00
Panel Discussion
5:00 – 6:00
Exhibition Even
WEDNESDAY, OCTOBER 21, 2009
8:00 – 8:45
Tutorial
Challenges
in Measuring High Speed Links
8:45 – 10:05
Innovative
Packaging Solutions
Electrical Modeling of
Annular and Co-axial TSVs Considering MOS Capacitance Effects
(Student Paper)
Tapobrata Bandyopadhyay,
Ritwik Chatterjee, Daehyun Chung, Madhavan Swaminathan
and Rao Tummala Georgia Institute of Technology
Multi-Bit Fractional Equalization
for Multi-Gb/s Inductively Coupled Connectors (Student Paper)
Evan Erickson.. North Carolina State University
John Wilson......... Rambus
Karthik Chandrasekar............. nVidia Corporation
Paul D. Franzon... North Carolina State University
Hybrid
Substrate Integrated Waveguides Developed Using Flexible Substrates (Student Paper)
Mohammad S. Mahani, Asanee Suntives and Ramesh
Abhari............. McGill
University
Frequency-Dependent Circuit Models
of Carbon Nanotube Networks
Mahmoud A. EL Sabbagh and Samir M.
El-Ghazaly..... University of
Arkansas
10:05 – 10: 25
Break
10:25 –
11:45
EM Modeling
and Simulation
A Two-Level Optimization
Scheme for Bandwidth Optimization of a Microprocessor Vertical Interconnect (Student Paper)
Arun V.
Sathanur and Vikram Jandhyala..... University
of Washington
Henning
Braunisch.. Intel Corporation
Defining a MultiChannel
Infrastructure to Enable MNA Formulation of Opto Electronic
Circuits
P. Gunupudi and T. Smy.......... Carleton University
J. Klein and J. Jakubczyk......... Optiwave Systems
Accelerated Frequency
Domain Analysis by Susceptance-Element Based Model Order Reduction of 3D
Full-wave Equations (Student Paper)
Narayanan T.V., Sung-Hwan Min and Madhavan
Swaminathan..
...... Georgia
Institute of Technology
An Unconditionally Stable Time-Domain Finite Element Method
of Significantly Reduced Computational Complexity for Large-Scale Simulation of
IC and Package Problems (Student
Paper)
Houle Gan
and Dan Jiao............ Purdue
University
11:45 – 12:10 Awards and Closing Remarks